Complexity minimization

Because the previous post should have appeared on the 18th of November lets assume that this is the first post in January. So.

First of all happy new Year to all readers of this blog. Let this Year be better than the previous one :).

I thought a lot of this post and of my next step in the stepper motor driver which will control my cnc drill. Actually there are some things going on. They are not going very fast, but many of them at the same time. So I would like to sum up my achievements and ideas and findings although the solutions they present will not be used in my future work. Still it can happen, that someone (including myself) will find them interesting and useful.

So lets get on with the topic.

In the previous article I presented the Circuit board with elements on it. One of the most important sentences in that article was about the pin headers which are used to steer the transistors.

Image 1. The PCB.

In the first image I present the PCB with the input pin headers which are indexed with the first 6 alphabet characters. On the image 2 I have presented the exciting sequence of the stepper, where I have also marked the characters representing the input which takes place in a concrete step.

Image 2. The modified exciting sequence.

To minimise the whole circuit I have transformed the already modified exciting sequence to yet an another table.

Image 3. Exciting sequence from the perspective of the driver

I think, that this table from image 3 is self descriptive. Still I will try to explain the underlying idea taking the step 1 as an example.
In the 1'st step the inputs that will be steered with 5V are A and E. That means, that the remaining inputs (B, C, D, F) will be steered with 0V. The A and E match the U+ and V- of the driver inputs. The transistors steered with 0V do nothing (conduct nothing, they are OFF). The ones, that are steered with 5V will conduct the current from the drain of the transistor (the middle leg) to the source of the transistor (the lower leg, if the transistor is oriented like the Q4 in the image 1).
So at a time, we are steering only 2 transistors, the current flows from + of the J1 to the - (Yes I know, this is not exactly true, but lets leave this alone).

The next table shows the explanation presented above for all driver inputs.

Image 4. The basis for the Karnaugh minimisation.

As I have stated in the Image caption the table is the base for the Karnaugh minimisation, as I present below.

Image 5. Minimisation.

 The functions presented in the image 5 can be transformed into a better version as I show below.

Image 6. Transformation. Done using eqneditor.

From this couple of equations I have created a circuit. It is not that complicated as it seems at the beginning. But let me explain the difficulties in building the circuit shown in image 7.

Image 7. Circuit build from the minimisation.

First of all lets sum this up:

• 6 times 2 input AND gate => 2x quad 2 input AND 7408
• 3 times 2 input OR gate => 1x quad 2 input OR 7432
• 2 times 2 input NOR gate => 1x quad 2 input NOR 7402

All parts used in this module would cost about 1$. This is of course an advantage. On the other hand the creation of such circuit on a pcb is not a trivial task, it is more complicated than the driver itself. What is more. This circuit above is logically correct but in the real world one cannot avoid problems connected with logical gates. To the most important issues the gates and all combinational logic circuits have are race conditions.
So to avoid all problems connected with the idea above I decided to solve this problem in a different manner. I am not sure if I will state the truth now bit I will try. The easiest solution for my problem here is the usage of PCF8574.

But that is a topic for the next post which I will write as soon as I order the micro controller and test it for a while.

PS. For all who are interested in the details of the PCF8574 please visit this or this (caution the second link is in polish).